ARC-302 · Processor Architecture · Advanced
Arm64 Systems Programming — full syllabus
AArch64 for systems engineers: exception levels, translation regimes and the memory model that trips up x86 developers.
Duration4 full days in person · 8 half-days online
Cohortmax 14 in person · 20 online
Pricefrom SAR 12,000 in person · local pricing per city
Delivery35% principles · 20% guided investigation · 45% engineering studio
Who this course is for
Systems engineers moving to Arm64 servers or SoCs who keep being surprised by behaviour that x86 habits mis-predict.
Prerequisites
- C and assembly reading ability
- Linux systems programming experience
- x86-64 architecture knowledge helpful for contrast
Course outline
Day 1 — The exception model
- Exception levels EL0-EL3 and the security model
- System registers and how they differ from x86 MSRs
- The AArch64 register file and calling convention
- Vector tables, exception entry and ERET
- PSCI and what firmware still owns
Day 2 — Translation regimes
- TTBR0/TTBR1 split and address tagging
- Page table formats and attributes: AF, SH, AP, XN
- TLBs and the invalidation rules
- Contiguous hints and block mappings
- Walking translation tables in a QEMU guest
Day 3 — Interrupts and the GIC
- GIC interrupt controllers and their generations: v2, v3, v4
- Distributor, redistributor and CPU interface
- SGIs, PPIs and SPIs; LPIs and the ITS for MSI
- From device raise to handler through the kernel's GIC driver
- Tracing IRQ delivery with ftrace
Day 4 — The weak memory model
- The weakly-ordered model in practice: what may reorder
- Barriers DMB, DSB, ISB and acquire/release semantics
- Litmus tests with herd7: Arm versus x86-TSO outcomes
- Feature discovery via ID registers and hwcap
- Errata handling in the Arm ecosystem
Hands-on labs
- Lab: boot an Arm64 kernel under QEMU, trace an exception from EL0 to EL1, and decode ESR_EL1 and FAR_EL1 on an injected fault
- Lab: build and walk an AArch64 page table by hand, then verify its attributes against a translation fault you trigger
- Lab: trace an interrupt from GIC distributor to CPU interface and follow it into the kernel handler with ftrace
- Lab: run herd7 litmus tests that distinguish Arm ordering from x86-TSO and map the outcomes onto barrier choices
- Lab: read ID_AA64 feature registers on a real or emulated system and reconcile them with the kernel's hwcap output
Capstone project
Produce an Arm64 platform evidence pack in QEMU (and on hardware where available): an exception-level and vector-table map, a hand-verified page-table walk with fault decode, a GIC interrupt trace, and a memory-ordering litmus report stating which reorderings the platform can exhibit and which barrier choices follow.
What you leave with
- A working model of EL0-EL3, translation regimes and the GIC
- Fault-decode skills with ESR and FAR on real exceptions
- Hands-on memory-model reasoning with litmus tests
- Feature-discovery and errata habits specific to Arm platforms
Upcoming dates
| Dates | Where | Seats | Early bird | Regular | |
|---|---|---|---|---|---|
| 18 Oct – 21 Oct 20264 full days | RiyadhIn person · KAFD Conference Centre | 3 of 14 | — | SAR 12,000 | |
| 18 Oct – 21 Oct 20264 full days | Kuwait CityIn person · Al Hamra Tower | 8 of 14 | — | KWD 990 | |
| 25 Oct – 28 Oct 20264 full days | MuscatIn person · Knowledge Oasis Muscat | 3 of 14 | — | OMR 1,230 | |
| 1 Nov – 10 Nov 20268 half-days | Gulf bandLive online · 09:00–13:00 GMT+3 | 13 of 20 | — | US$2,300 | |
| 2 Nov – 5 Nov 20264 full days | OttawaIn person · Kanata North Tech Park | 8 of 14 | — | CAD 4,350 | |
| 2 Nov – 5 Nov 20264 full days | TorontoIn person · MaRS Discovery District | 3 of 14 | — | CAD 4,350 | |
| 2 Nov – 11 Nov 20268 half-days | Europe bandLive online · 09:00–13:00 CET | 18 of 20 | — | US$2,300 | |
| 9 Nov – 12 Nov 20264 full days | LondonIn person · Shoreditch Works | 8 of 14 | GBP 2,250until 10 Oct | ||
| 9 Nov – 18 Nov 20268 half-days | Americas bandLive online · 13:00–17:00 ET | 7 of 20 | US$2,070until 10 Oct | ||
| 16 Nov – 19 Nov 20264 full days | BerlinIn person · Factory Görlitzer Park | 3 of 14 | EUR 2,650until 17 Oct |
Book a seat, or bring this course to your team
Seats can be reserved online; private delivery runs on-site or live online, adapted to your stack.
Questions about fit or prerequisites? Email hello@kernelsystems.academy. To save this syllabus, print this page to PDF from your browser.