ARC-303 · Processor Architecture · Advanced
RISC-V Systems Programming — full syllabus
RISC-V privileged architecture for engineers arriving from x86 or Arm, including the state of the software ecosystem.
Who this course is for
Engineers evaluating or porting to RISC-V who need the privileged architecture and the real state of the ecosystem, not the brochure version.
Prerequisites
- C and assembly reading ability
- Exposure to another ISA's privileged architecture (x86-64 or Arm64)
- Linux systems programming experience
Course outline
Day 1 — The ISA and its modularity
- Base ISA, standard extensions and profiles
- What 'RISC-V' on a datasheet does and does not promise
- Machine, supervisor and user modes
- CSRs and the trap model
- Reading the privileged specification without drowning
Day 2 — Virtual memory and platform services
- Sv39/Sv48 paging and the page-table formats
- The SBI interface and what still lives in machine mode
- PLIC and CLINT interrupt handling
- The boot flow from OpenSBI to the kernel
- Walking every piece in QEMU virt
Day 3 — The ecosystem as it is
- Toolchain, emulation and hardware availability today
- Extensions of systems interest, including the vector extension
- Portability pitfalls arriving from x86 or Arm
- Performance expectations and how to measure rather than assume
- An honest read of what is ready and what is not
Hands-on labs
- Lab: boot a RISC-V Linux kernel under QEMU virt, trace the OpenSBI handoff, and enumerate extensions from the device tree and CSRs
- Lab: walk an Sv39 page table for a live process and decode the PTE bits by hand
- Lab: trigger and decode traps through the SBI call path, reading scause, stval and sepc
- Lab: cross-compile a workload with the RISC-V toolchain, run it under QEMU, and compare measured behaviour against an x86-64 baseline
Capstone project
Assemble a bring-up notebook for a RISC-V platform in QEMU: a boot-flow trace from firmware to kernel, a CSR and extension inventory, a hand-decoded page-table walk, and an SBI/PLIC interrupt exercise — closing with an honest assessment of what porting a stated piece of software to this platform would actually involve.
What you leave with
- A precise picture of RISC-V privilege modes, CSRs and paging
- Hands-on SBI, PLIC and CLINT experience under QEMU
- A cross-compilation and emulation workflow that works today
- An evidence-based view of the ecosystem's current limits
Upcoming dates
| Dates | Where | Seats | Early bird | Regular | |
|---|---|---|---|---|---|
| 18 Oct – 20 Oct 20263 full days | RiyadhIn person · KAFD Conference Centre | 4 of 14 | — | SAR 9,000 | |
| 18 Oct – 20 Oct 20263 full days | Kuwait CityIn person · Al Hamra Tower | 9 of 14 | — | KWD 740 | |
| 25 Oct – 27 Oct 20263 full days | MuscatIn person · Knowledge Oasis Muscat | 4 of 14 | — | OMR 920 | |
| 1 Nov – 8 Nov 20266 half-days | Gulf bandLive online · 09:00–13:00 GMT+3 | 14 of 20 | — | US$1,750 | |
| 2 Nov – 4 Nov 20263 full days | OttawaIn person · Kanata North Tech Park | 9 of 14 | — | CAD 3,260 | |
| 2 Nov – 4 Nov 20263 full days | TorontoIn person · MaRS Discovery District | 4 of 14 | — | CAD 3,260 | |
| 2 Nov – 9 Nov 20266 half-days | Europe bandLive online · 09:00–13:00 CET | 3 of 20 | — | US$1,750 | |
| 9 Nov – 11 Nov 20263 full days | LondonIn person · Shoreditch Works | 9 of 14 | GBP 1,680until 10 Oct | ||
| 9 Nov – 16 Nov 20266 half-days | Americas bandLive online · 13:00–17:00 ET | 8 of 20 | US$1,580until 10 Oct | ||
| 16 Nov – 18 Nov 20263 full days | BerlinIn person · Factory Görlitzer Park | 4 of 14 | EUR 1,990until 17 Oct |
Book a seat, or bring this course to your team
Seats can be reserved online; private delivery runs on-site or live online, adapted to your stack.
Questions about fit or prerequisites? Email hello@kernelsystems.academy. To save this syllabus, print this page to PDF from your browser.