DRV-301 · Device Drivers · Advanced

DMA Engines & Mappings — full syllabus

Moving data without the CPU: the DMA API, coherency, IOMMU interaction and the bugs that only appear under load.

Duration3 full days in person · 6 half-days online
Cohortmax 14 in person · 20 online
Pricefrom SAR 9,000 in person · local pricing per city
Delivery35% principles · 20% guided investigation · 45% engineering studio

Who this course is for

Experienced driver engineers whose devices move real data — where coherency, mapping lifetime and IOMMU behaviour decide whether the driver is correct or merely lucky.

Prerequisites

Course outline

Day 1 — The streaming and coherent APIs

  • Coherent vs streaming mappings and when each is correct
  • dma_map_single, dma_unmap_single and direction flags
  • Ownership transitions: dma_sync_single_for_cpu/device
  • DMA addresses vs physical addresses and why they differ
  • Addressing limits, masks and bounce buffering

Day 2 — Scatter-gather and DMA engines

  • struct scatterlist and dma_map_sg segment handling
  • The dmaengine framework: channels, descriptors, cookies
  • Slave DMA setup and the dma_async_tx_callback contract
  • memcpy offload and cyclic DMA for streaming peripherals
  • What virt-dma does underneath your driver

Day 3 — IOMMU and debugging under load

  • IOMMU translation, domains and isolation from the driver's seat
  • ARM SMMU vs Intel VT-d: what changes for you and what does not
  • Classic coherency bugs: stale data, partial transfers, line sharing
  • DMA API debugging with dma-debug and IOMMU fault logs
  • Tracing DMA activity and correlating it with device state

Hands-on labs

  1. Lab: Reproduce a stale-data bug by omitting dma_sync_single_for_cpu, then fix it and prove the fix with a stress loop
  2. Lab: Convert a single-buffer mapping to scatter-gather and verify segment handling with dma-debug enabled
  3. Lab: Drive a slave DMA channel through the dmaengine API with a completion callback; benchmark it against a CPU copy
  4. Lab: Inspect your device's DMA addresses through the IOMMU and capture a deliberate IOMMU fault report
  5. Lab: Chase an injected partial-transfer bug with dma-debug and ftrace; write up the root cause with the trace attached

Capstone project

Implement a DMA-backed producer/consumer path with correct ownership transitions at every handoff, then benchmark copy vs coherent vs streaming strategies on real transfers — delivering correctness tests, a DMA trace, a captured IOMMU fault and a throughput/latency comparison that ends in a defensible mapping-strategy recommendation.

What you leave with

Upcoming dates

DatesWhereSeatsEarly birdRegular
8 Nov – 10 Nov 20263 full days RiyadhIn person · KAFD Conference Centre 8 of 14 SAR 8,100until 9 OctSAR 9,000
15 Nov – 17 Nov 20263 full days Kuwait CityIn person · Al Hamra Tower 3 of 14 KWD 670until 16 OctKWD 740
15 Nov – 17 Nov 20263 full days MuscatIn person · Knowledge Oasis Muscat 8 of 14 OMR 830until 16 OctOMR 920
22 Nov – 29 Nov 20266 half-days Gulf bandLive online · 09:00–13:00 GMT+3 18 of 20 US$1,580until 23 OctUS$1,750
23 Nov – 25 Nov 20263 full days OttawaIn person · Kanata North Tech Park 3 of 14 CAD 2,930until 24 OctCAD 3,260
23 Nov – 30 Nov 20266 half-days Europe bandLive online · 09:00–13:00 CET 7 of 20 US$1,580until 24 OctUS$1,750
30 Nov – 2 Dec 20263 full days TorontoIn person · MaRS Discovery District 8 of 14 CAD 2,930until 31 OctCAD 3,260
30 Nov – 2 Dec 20263 full days LondonIn person · Shoreditch Works 3 of 14 GBP 1,680until 31 OctGBP 1,870
30 Nov – 7 Dec 20266 half-days Americas bandLive online · 13:00–17:00 ET 12 of 20 US$1,580until 31 OctUS$1,750
7 Dec – 9 Dec 20263 full days BerlinIn person · Factory Görlitzer Park 8 of 14 EUR 1,990until 7 NovEUR 2,210

Book a seat, or bring this course to your team

Seats can be reserved online; private delivery runs on-site or live online, adapted to your stack.

Course page & booking

Questions about fit or prerequisites? Email hello@kernelsystems.academy. To save this syllabus, print this page to PDF from your browser.