DRV-301 · Device Drivers
DMA Engines & Mappings
Moving data without the CPU: the DMA API, coherency, IOMMU interaction and the bugs that only appear under load.
Who this course is for
Experienced driver engineers whose devices move real data — where coherency, mapping lifetime and IOMMU behaviour decide whether the driver is correct or merely lucky.
Prerequisites
Course outline
Day 1 — The streaming and coherent APIs
- Coherent vs streaming mappings and when each is correct
- dma_map_single, dma_unmap_single and direction flags
- Ownership transitions: dma_sync_single_for_cpu/device
- DMA addresses vs physical addresses and why they differ
- Addressing limits, masks and bounce buffering
Day 2 — Scatter-gather and DMA engines
- struct scatterlist and dma_map_sg segment handling
- The dmaengine framework: channels, descriptors, cookies
- Slave DMA setup and the dma_async_tx_callback contract
- memcpy offload and cyclic DMA for streaming peripherals
- What virt-dma does underneath your driver
Day 3 — IOMMU and debugging under load
- IOMMU translation, domains and isolation from the driver's seat
- ARM SMMU vs Intel VT-d: what changes for you and what does not
- Classic coherency bugs: stale data, partial transfers, line sharing
- DMA API debugging with dma-debug and IOMMU fault logs
- Tracing DMA activity and correlating it with device state
Hands-on labs
Labs follow the academy model — 35% principles, 20% guided investigation, 45% engineering studio. Every claim you make in a lab is backed by a trace, a counter or a measurement you captured yourself. How we teach
- Lab: Reproduce a stale-data bug by omitting dma_sync_single_for_cpu, then fix it and prove the fix with a stress loop
- Lab: Convert a single-buffer mapping to scatter-gather and verify segment handling with dma-debug enabled
- Lab: Drive a slave DMA channel through the dmaengine API with a completion callback; benchmark it against a CPU copy
- Lab: Inspect your device's DMA addresses through the IOMMU and capture a deliberate IOMMU fault report
- Lab: Chase an injected partial-transfer bug with dma-debug and ftrace; write up the root cause with the trace attached
Capstone project
Implement a DMA-backed producer/consumer path with correct ownership transitions at every handoff, then benchmark copy vs coherent vs streaming strategies on real transfers — delivering correctness tests, a DMA trace, a captured IOMMU fault and a throughput/latency comparison that ends in a defensible mapping-strategy recommendation.
What you leave with
- Correct streaming-mapping discipline: map, sync, unmap, ownership
- Scatter-gather and dmaengine skills for real peripherals
- A working model of what the IOMMU does to your DMA addresses
- A debugging toolkit for coherency and partial-transfer bugs
- Measured evidence for choosing between mapping strategies
How it runs
Every course follows the same model: 35% principles, 20% guided investigation, 45% engineering studio. You leave with working code, raw measurements and an evidence-based report — not a certificate of attendance. Read the methodology or see a full sample lesson.
Material is adapted to your kernel version, hardware and workload before a private delivery. For public cohorts, the environment is provided and configured.
Questions
Who is this course for?
Experienced driver engineers whose devices move real data — where coherency, mapping lifetime and IOMMU behaviour decide whether the driver is correct or merely lucky. It sits at advanced level within the Device Drivers track.
What do I need to know already?
Specific prerequisites for this course: DRV-110 device model and a working driver you have written; Cache-coherency fundamentals (ARC-103 level) strongly recommended; C and kernel debugging basics. We confirm levels before the cohort starts and adapt if a group is stronger or weaker than expected.
Can this run privately for my team?
Yes. Any course runs on-site at your offices anywhere, or live online for a distributed team, with labs adapted to your hardware and codebase.
What is the difference between in-person and online?
In person is 3 full days with hardware on your desk, capped at 14. Online is 6 half-day sessions across about two weeks so you can keep working, capped at 20, with remote lab access.
Do you invoice companies?
Yes. Purchase orders are accepted and invoicing is available in USD, EUR, GBP, SAR and CAD.
Upcoming dates
| Dates | Where | Seats | Early bird | Regular | |
|---|---|---|---|---|---|
| 8 Nov – 10 Nov 20263 full days | RiyadhIn person · KAFD Conference Centre | 8 of 14 | SAR 8,100until 9 Oct | ||
| 15 Nov – 17 Nov 20263 full days | Kuwait CityIn person · Al Hamra Tower | 3 of 14 | KWD 670until 16 Oct | ||
| 15 Nov – 17 Nov 20263 full days | MuscatIn person · Knowledge Oasis Muscat | 8 of 14 | OMR 830until 16 Oct | ||
| 22 Nov – 29 Nov 20266 half-days | Gulf bandLive online · 09:00–13:00 GMT+3 | 18 of 20 | US$1,580until 23 Oct | ||
| 23 Nov – 25 Nov 20263 full days | OttawaIn person · Kanata North Tech Park | 3 of 14 | CAD 2,930until 24 Oct | ||
| 23 Nov – 30 Nov 20266 half-days | Europe bandLive online · 09:00–13:00 CET | 7 of 20 | US$1,580until 24 Oct | ||
| 30 Nov – 2 Dec 20263 full days | TorontoIn person · MaRS Discovery District | 8 of 14 | CAD 2,930until 31 Oct | ||
| 30 Nov – 2 Dec 20263 full days | LondonIn person · Shoreditch Works | 3 of 14 | GBP 1,680until 31 Oct | ||
| 30 Nov – 7 Dec 20266 half-days | Americas bandLive online · 13:00–17:00 ET | 12 of 20 | US$1,580until 31 Oct | ||
| 7 Dec – 9 Dec 20263 full days | BerlinIn person · Factory Görlitzer Park | 8 of 14 | EUR 1,990until 7 Nov |
Dates shown for the next few months. If nothing fits, tell us where and when — cohorts are added on demand, and private delivery can be scheduled any week.
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